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Development of FPGA and DDR Memory Based Fast Event Recording and Data Storage System for Machine Vision Applications

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dc.contributor.author Patel, Jinal
dc.contributor.author Chaudhari, Vishnu
dc.contributor.author Ganeshan, Navin
dc.contributor.author Joshi, H C
dc.date.accessioned 2019-11-21T16:21:05Z
dc.date.available 2019-11-21T16:21:05Z
dc.date.issued 2019-06-06
dc.identifier.isbn 9781786354273
dc.identifier.uri http://library.ediindia.ac.in:8181/xmlui//handle/123456789/9722
dc.description.abstract For fail-safe operation of any plant, machine, or scientific experiment, the real-time monitoring of every component is essentially critical. Lossless acquisition of raw data, signal processing, and data storage are the main electronic processes for the monitoring of machine. The recording and storage of fast events demand high speed embedded system with higher storage capacity and speed. The field programmable gate array (FPGA) is a reconfigurable processor available to work at high speed ~500 MHz with signal processing and computer interfacing features. The double data rate (DDR) memory is available with 1 G bits capacity and speed of ~500 Mbps. In this paper, we report the development of FPGA-based event recording system for monitoring of glass window fabricated for one of the vacuum chambers. The glass window may get damaged with time due to high power laser and surroundings. The FPGA and DDR memory based embedded systems perform routine checks on the glass window and provide the mechanism for on-board data storage and send status in real time to other sub-systems during false events for operating the machine interlock. Details of hardware architecture, software development, and results are presented in the paper. We believe that the developed work will be useful implications in many industrial and research applications. en_US
dc.language.iso en en_US
dc.publisher Emerald Group Publishing en_US
dc.subject Field programmable gate array en_US
dc.subject Double data rate -SDRAM en_US
dc.subject Event monitoring en_US
dc.subject Interlock en_US
dc.subject Machine vision en_US
dc.title Development of FPGA and DDR Memory Based Fast Event Recording and Data Storage System for Machine Vision Applications en_US
dc.type Article en_US


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